: If the tool outputs errors stating components cannot be linked, double check your .synopsys_dc.setup paths. Ensure that all standard cell packages ( .db ) and design block files are present in the search list.
load_upf ./design.upf set_voltage -object_list VDD1 -type primary -value 1.0 synopsys design compiler tutorial 2021
check_design > $report_dir/check_design.rpt report_design > $report_dir/design_info.rpt : If the tool outputs errors stating components